Cycle-stealing mode of DMA operation involves:

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ESE Electrical 2013 Paper 2: Official Paper

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DMA controller takes over the address, data and control buses while a block of data is transferred between memory and an I/O device
While the μP is executing a program an interface circuit takes over control of the address, data and control buses when not in use by the μP
Data transfer takes place between the I/O device and memory during every alternate clock cycle
The DMA controller waits for the μP to finish execution of the program and then takes over the buses.

Answer 1

There are three modes of DMA operation:

1. Burst mode DMA,

the CPU can be put on hold while the DMA transfer occurs and a full block of possibly hundreds or thousands of bytes can be moved
For the entire duration of the transfer, the CPU stays idle and the DMA controller and the peripheral device gets complete access to the system buses

2. Transparent mode

It takes the most time to transfer a block of data, yet it is also the most efficient mode in terms of overall system performance
In transparent mode, the DMA controller transfers data only when the CPU is performing operations that do not use the system buses

3. Cycle stealing mode

In this only one byte of data transferred in a single request, after one byte of data transfer, the control of the system bus is given back to the CPU transferring one byte of data per request, until the entire block of data has been transferred.